Summary: This internship offers a motivated student the opportunity to explore and implement cutting-edge applications of Large Language Models on Intel hardware, with a focus on FPGA-based solutions. Highlights: 1. Explore and implement cutting-edge LLM applications on Intel hardware 2. Work on pathfinding projects to improve RTL design efficiency 3. Develop FPGA-based AI prototypes leveraging Intel FPGAs **Job Details:** ================ **Job Description:** -------------------- This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position. IATG group in Mexico is seeking a motivated student to explore and implement cutting\-edge applications of Large Language Models on Intel hardware, with a special emphasis on FPGA\-based solutions and engineering knowledge graphs. As part of this internship, you will be part of a small Research and Development team, that path finds next\-gen technologies to improve Intel's products. Your responsibilities will include but not limited to:Work on pathfinding projects on how to improve the efficiency of RTL design for FPGA and ASIC flows. Develop FPGA\-based AI prototypes leveraging Intel FPGAs (e.g., Stratix, Agilex) by investigating accelerated inference workflows. Work on bringing up modern LLMs on Intel hardware for local infrastructure and benchmark different model architectures for latency, throughput, and energy efficiency. **Qualifications:** ------------------- Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. **Minimum Qualifications:** * Pursuing a PhD degree program in Electrical Engineering, Computer Science, or related fields. * 1\+ year of experience in: + FPGA design flows (Intel Quartus or similar) and hardware description languages (VHD, Verilog or SystemVerilog). + Machine learning frameworks (Pytorch, TensorFlow) and Python scripting language. * Advance English level. * Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship). **Preferred Qualifications:** * Familiar with oneAPI, OpenVINO or similar Intel toolchains. * Experience deploying LLMs on clusters. * Exposure to LLM architectures and large\-scale deep learning models. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. A candidate who accepts an offer of employment in Mexico is required to present their own personal identification information and numbers for the following: Mexican Security Number (NSS), Tax Identification Number (RFC) and CURP identification number. **Job Type:** ------------- Student / Intern **Shift:** ---------- Shift 1 (Mexico) **Primary Location:** --------------------- Mexico, Guadalajara **Additional Locations:** ------------------------- **Business group:** ------------------- The Central Engineering Group (CEG) is Intel's data\-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer\-driven, end\-to\-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses. **Posting Statement:** ---------------------- All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. **Position of Trust** --------------------- N/A **Work Model for this Role** This role will require an on\-site presence. \* Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.