Summary: Join a global leader in advanced semiconductors as a Physical Design Engineer, driving innovative silicon solutions for high-performance devices and next-generation wireless connectivity. Highlights: 1. Work on cutting-edge advanced semiconductor design and development 2. Contribute to innovative devices and next-gen wireless connectivity 3. Engage in a fast-paced environment with technical leadership opportunities This position is to work with a global leader company in the design and development of advanced semiconductors, responsible for architectures and platforms that form the core of some of the most innovative devices on the market. Its silicon engineering drives solutions that deliver high performance, energy efficiency, and intelligent integration, complemented by a key role in advancing modern telecommunications through next\-generation wireless connectivity technologies. Its solutions are integrated into billions of devices worldwide, offering an ideal professional environment for talent seeking technological impact, innovation, and growth within a global context. We are looking for a physical design engineer to join our design team in Tijuana Baja California. Successful candidate will be part of design group responsible to deliver IP implementation like high\-speed DDR, USB, PCI, PLL and mixed Digital and Analog designs. This person should demonstrate extensive knowledge in physical design flow and methodologies to ensure high quality and timely release, successful silicon in nanometer technologies, understand key design challenges and solutions. **Responsibilities:** * Provide technical leadership and direction to project execution. * Manage project timelines, deliverables, and track them to closure. * Mentor, guide, and help team members in a fast\-paced environment. * Collaborate with design team and work with cross\-functional teams. * Use good verbal and written communication skills to describe daily technical and non\-technical issues. * Take responsibility for your own work and making decisions. * Exercise creativity to troubleshoot technical problems. **Requirements:** * Bachelor’s Degree or higher in Electrical Engineering, Computer Engineering, or related fields. * A minimum of 6 years’ experience in physical design engineering. * + Successful Tapeouts in Nanometer Technologies. + Understanding of complex foundry design rules and requirements. * In\-depth knowledge of design flow RTL to GDS process. * + Automatic and custom placement. + Multi\-voltage power domains. + Pre\-placement and pre\-routing. + Understand Timing constraints. + Fixing timing violations. + DRC, LVS, ERC, DFM. + Virtuoso is a plus. * + Floor\-planning. + Power Design Networks PDN\-planning. + Place \& Route. + Clock Tree Synthesis and customization. + Static Timing Analysis. + Physical Verification. * Experience with industry\-leading tools. * + Cadence. + Synopsys. + Mentor. + Ansys. * Working knowledge of programming languages, HDL, OS. * + Python, C\+\+, TCL, Perl, Awk. + Verilog/VHDL, Unix/Linux. * Excellent written and verbal communication. * Automation with Perl, Python, and TCL is a plus. **Minimum Qualifications:** * Education: Bachelors \- Engineering, Bachelors \- Science. * Work Experiences: 1\+ years ASIC design, verification, or related work experience.