**Job Summary:** We are looking for a highly motivated SRAM Mask Layout Designer to join our custom memory design team. This entry\-level position offers an opportunity to work on cutting\-edge semiconductor technologies and gain hands\-on experience in physical layout design for SRAM and other memory circuits. **Job description:** * Assist in creating physical layouts for SRAM and custom memory blocks using industry\-standard CAD tools (e.g., Cadence Virtuoso). * Perform layout verification including DRC (Design Rule Check), LVS (Layout vs. Schematic), and ERC. * Collaborate with circuit designers to ensure layout meets performance, reliability, and manufacturability requirements. * Maintain layout database utilizing Design Management software. * Engage with the engineering design team to understand design concepts, constraints, and milestones. Concisely and accurately report design status to the layout and engineering team; track schedules. * Proactively and independently solve design and PDK issues; clearly communicate solutions to the layout and engineering team. * Work closely with circuit Designers/ Mask Layout Designers across global sites (such as the U.S., Taiwan and India) * Demonstrate effective communication and teamwork; work efficiently as part of an international team. **Minimum Qualifications:** * Associate’s degree/Certificate in computer Science, Mathematics, Electrical Engineering or related field * Basic understanding of CMOS technology and IC design principles. * Strong attention to detail and ability to work in a team environment. **Preferred Qualifications**: * Bachelor’s degree in computer science, Engineering, or related field. * Understanding of parasitic effects and reliability considerations. * Familiarity with scripting languages (SKILL, Python) for layout automation. * Knowledge of advanced process nodes (e.g., FinFET, GAA) is a plus.